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  acpl-m484/p484/w484 positive logic high cmr intelligent power module and gate drive interface optocoupler data sheet caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. description the acpl-m484/p484/w484 fast speed optocoupler con- tains a algaas led and photo detector with built-in schmitt trigger to provide logic-compatible waveforms, elimi- nating the need for additional wave shaping. the totem pole output eliminates the need for a pull up resistor and allows for direct drive intelligent power module or gate drive. minimized propagation delay diff erence between devices makes these optocouplers excellent solutions for improving inverter effi ciency through reduced switching dead time. applications ?? ipm interface isolation ?? isolated igbt/mosfet gate drive ?? ac and brushless dc motor drives ?? industrial inverters ?? general digital isolation functional diagram note: a 0.1 ? f bypass capacitor must be con- nected between pins vcc and ground. truth table (positive logic) led v o on high off low truth table guaranteed: vcc from 4.5 v to 30 v features ?? positive output type (totem pole output) ?? truth table guaranteed: vcc from 4.5 v to 30 v ?? performance specifi ed for common ipm applications over industrial temperature range. ?? short maximum propagation delays ?? minimized pulse width distortion (pwd) ?? very high common mode rejection (cmr) ?? hysteresis ?? available in so-5 (acpl-m484) and stretched so-6 package (acpcl-p484/w484). ?? package clearance/creepage at 8 mm (acpl-w484) ?? safety approval: (pending) C ul recognized with 5000 v rms (acpl-w484) for 1 minute per ul1577. C csa approved. C iec/en/din en 60747-5-5 approved with v iorm = 567 v peak for acpl-m484 and v iorm = 891 v peak for acpl-p484 and v iorm = 1140 v peak for acpl-w484, under option 060. specifi cations ?? wide operating temperatur e range: -40 c to 105 c ?? maximum propagation delay t phl / t plh = 150/120 ns ?? maximum pulse width distortion (pwd) = 90 ns ?? propagation delay diff erence min/max = -130/130 ns ?? wide operating v cc range: 4.5 to 30 volts ?? 30 kv/ ? s minimum common mode rejection (cmr) at v cm = 1000 v ground v cc anode cathode v o 5 1 4 3 2 shield ground v cc anode n.c. cathode v o 6 1 5 2 4 3 shield acpl-m484 acpl-p484 & acpl-w484
2 ordering information acpl-m484/p484/w484 is ul recognized with 3750/3750/5000 vrms/1 minute rating per ul 1577. part number option package surface mount tape & reel iec/en/din en 60747-5-5 quantity rohs compliant acpl-m484 -000e so-5 x 100 per tube -500e x x 1500 per reel -060e x x 100 per tube -560e x x x 1500 per reel acpl-p484 acpl-w484 -000e stretched so-6 x 100 per tube -500e x x 1000 per reel -060e x x 100 per tube -560e x x x 1000 per reel to order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. example 1: acpl-p484-560e to order product of stretched so-6 surface mount package in tape and reel packaging with iec/en/ din en 60747-5-5 safety approval in rohs compliant. example 2: acpl-p484-000e to order product of stretched so-6 surface mount package in tube packaging and rohs compliant. example 3: acpl-m484-000e to order product of so-5 surface mount package in tube packaging and rohs compliant. option datasheets are available. contact your avago sales representative or authorized distributor for information.
3 package outline drawings acpl-m484 so-5 package, 5 mm creepage & clearance mxxx xxx 6 5 4 3 1 7.0 0.2 (0.276 0.008) 2.5 0.1 (0.098 0.004) 0.102 0.102 (0.004 0.004) v cc v out gnd cathode anode 4.4 0.1 (0.173 0.004) 1.27 (0.050) bsc 0.15 0.025 (0.006 0.001) 0.71 (0.028) min 0.4 0.05 (0.016 0.002) 3.6 0.1* (0.142 0.004) dimensions in millimeters (inches). * maximum mold flash on each side is 0.15 mm (0.006). note: foating lead protrusion is 0.15 mm (6 mils) max. type number (last 3 digits) date code 7 max. max. lead coplanarity = 0.102 (0.004) land pattern recommendation 8.27 (0.325) 2.0 (0.080) 2.5 (0.10) 1.3 (0.05) 0.64 (0.025) 4.4 (0.17) dimension in millimeters (inches)
4 acpl-p484 stretched so-6 package, 7 mm clearance 7 7 45 5 nom. 0.381 0.127 (0.015 0.005) 1.27 (0.050) bsg 4.580 + 0.254 ? 0 7 7 3.180 0.127 (0.125 0.005) 1.590 0.127 (0.063 0.005) 0.254 0.050 (0.010 0.002) 9.7 0.250 (0.382 0.010) 10.7 (0.421) 2.16 (0.085) 0.76 (0.030) 1.27 (0.050) floating lead protusions max. 0.25 (0.01) dimensions in millimeters (inches) lead coplanarity = 0.1 mm (0.004 inches) 0.180 + 0.010 ? 0.000 () 1 0.250 (0.040 0.010) 0.20 0.10 (0.008 0.004) 7.62 (0.300) 6.81 (0.268) 0.45 (0.018) land pattern recommendation acpl-w484 stretched so-6 package, 8 mm clearance land pattern recommendation (w-type) 45 7 7 2 1 34 5 6 7 7 0.381 0.127 (0.015 0.005) 0.20 0.10 (0.008 0.004) floating lead protusions max. 0.25 (0.01) dimensions in millimeters (inches) lead coplanarity = 0.1 mm (0.004 inches) 4.580 + 0.254 ? 0 0.180 + 0.010 ? 0.000 () 6.807 + 0.127 ? 0 0.268 + 0.005 ? 0.000 () 1.27 (0.050) bsg 35 nom. 0.750 0.250 (0.0295 0.010) 11.500 0.25 (0.453 0.010) 0.254 0.050 (0.010 0.002) 1.590 0.127 (0.063 0.005) 3.180 0.127 (0.125 0.005) 0.45 (0.018) 7.62 (0.300) 1.270 (0.050) 1.905 (0.075) 12.650 (0.498) 0.760 (0.030)
5 recommended pb-free ir profi le recommended refl ow condition as per jedec standard, j-std-020 (latest revision). non-halide flux should be used. regulatory information the acpl-m484/p484/w484 is pending approval by the following organizations: iec/en/din en 60747-5-5 (option 060 only) approved with maximum working insulation voltage v iorm = 567 v peak for acpl-m484, v iorm = 891 v peak for acpl-p484 and v iorm = 1140 v peak for acpl-w484 ul approval under ul 1577, component recognition program up to v iso = 3750 v rms file e55361 for acpl-m484 & acpl- p484; approval under ul 1577, component recognition program up to v iso = 5000 v rms file e55361 for acpl-w484; csa approval under csa component acceptance notice #5, file ca 88324. table 1. iec/en/din en 60747-5-5 insulation characteristics* (acpl-m484/p484/w484 option 060) description symbol acpl-m484 acpl-p484 acpl-w484 unit installation classifi cation per din vde 0110/1.89, table 1 for rated mains voltage 150 v rms for rated mains voltage 300 v rms for rated mains voltage 600 v rms i C iv i C iii i C ii i C iv i C iii i C ii i C iv i C iii i C ii climatic classifi cation 55/105/21 55/105/21 55/105/21 pollution degree (din vde 0110/1.89) 2 2 2 maximum working insulation voltage v iorm 567 891 1140 v peak input to output test voltage, method b* v iorm x 1.875 = v pr , 100% production test with t m = 1 sec, partial discharge < 5 pc v pr 1063 1670 2137 v peak input to output test voltage, method a* v iorm x 1.6 = v pr , type and sample test, t m = 10 sec, partial discharge < 5 pc v pr 907 1426 1824 v peak highest allowable overvoltage (transient overvoltage t ini = 60 sec) v iotm 6000 6000 8000 v peak safety-limiting values C maximum values allowed in the event of a failure. case temperature input current output power t s i s, input p s, output 175 230 600 175 230 600 175 230 600 c ma mw insulation resistance at t s , v io = 500 v r s >10 9 >10 9 >10 9 ? * refer to the optocoupler section of the isolation and control components designers catalog, under product safety regulation s section, (iec/en/ din en 60747-5-2) for a detailed description of method a and method b partial discharge test profi les.
6 table 2. insulation and safety related specifi cations parameter symbol acpl-m484 acpl-p484 acpl-w484 units conditions minimum external air gap (external clearance) l(101) 5.0 7.0 8.0 mm measured from input terminals to output terminals, shortest distance through air. minimum external tracking (external creepage) l(102) 5.0 8.0 8.0 mm measured from input terminals to output terminals, shortest distance path along body. minimum internal plastic gap (internal clearance) 0.08 0.08 0.08 mm through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. tracking resistance (comparative tracking index) cti >175 >175 >175 v din iec 112/vde 0303 part 1 isolation group iiia iiia iiia material group (din vde 0110, 1/89, table 1) table 3. absolute maximum ratings parameter symbol min. max. units note storage temperature t s -55 125 c operating temperature t a -40 105 c average input current i f(avg) 10 ma peak transient input current (<1 ? s pulse width, 300 pps) (<200 ? s pulse width, < 1% duty cycle) i f(tran) 1.0 40 a ma reverse input voltage v r 5v average output current i o 50 ma supply voltage v cc 035 output voltage v o -0.5 35 total package power dissipation (acpl-m484) p t 145 mw 1 total package power dissipation p t 210 mw 1 solder refl ow temperature profi le see refl ow thermal profi le. table 4. recommended operating conditions parameter symbol min. max. units note power supply voltage (1) v cc 4.5 30 v 2 forward input current (on) i f(on) 47ma forward input voltage (off) v f(off) C 0.8 v operating temperature t a -40 105 c note: 1. truth table guaranteed: 4.5 v to 30 v
7 table 5. electrical specifi cations over recommended operating conditions t a = -40 c to 105 c, v cc = +4.5 v to 30 v, i f(on) = 4 ma to 7 ma, v f(off) = 0 v to 0.8 v, unless otherwise specifi ed. all typical values at t a = 25 c. parameter symbol min. typ. max. units test conditions fig. note logic low output voltage v ol 0.3 v i ol = 3.5 ma 1, 3 0.5 i ol = 6.5 ma logic high output voltage v oh v cc -0.3 v cc -0.04 v i oh = -3.5 ma 2, 3, 7 vcc -0.5 v cc -0.07 i oh = -6.5 ma logic low supply current i ccl 1.5 3.0 ma v cc = 5.5 v, v f = 0 v, i o = 0 ma 1.7 3.0 ma v cc = 20 v, v f = 0 v, i o = 0 ma logic high supply current i cch 1.5 3.0 ma v cc = 5.5 v, i f = 7 ma, i o = 0 ma 1.7 3.0 ma v cc = 30 v, i f = 7 ma, i o = 0 ma threshold input current low to high i flh 0.8 2.2 ma threshold input voltage high to low v fhl 0.8 v i f = 4 ma logic low short circuit output current i osl 125 200 ma v o = v cc = 5.5 v, v f = 0 v 3 125 200 ma v o = v cc = 30 v, v f = 0 v logic high short circuit output current i osh -200 -125 ma v cc = 5.5 v, i f = 7 ma, v o = gnd 3 -200 -125 ma v cc = 20 v, i f = 7 ma, v o = gnd input forward voltage v f 1.3 1.5 1.7 v t a = 25 c, i f = 4 ma 4 1.85 v i f = 4 ma input reverse breakdown voltage bv r 5v i r = 10 ? a input diode temperature coeffi cient ? v f / ? t a 1.7 mv/c i f = 4 ma input capacitance c in 60 pf f = 1 mhz, v f = 0 v 4
8 table 6. switching specifi cations over recommended operating conditions t a = -40 c to 105 c, v cc = +4.5 v to 30 v, i f(on) = 4 ma to 7 ma, v f(off) = 0 v to 0.8 v, unless otherwise specifi ed. all typicals at t a = 25 c. parameter symbol min. typ. max. units test conditions fig. note propagation delay time to logic low output level t phl 95 150 ns c l = 100 pf, i f (on) = 4 ma ?? v f = 0 v 5, 6, 8 6 150 loaded as per fig. 5 propagation delay time to logic high output level t plh 85 120 ns c l = 100 pf, v f = 0 v ? i f (on) = 4 ma 5, 6, 8 6 120 loaded as per fig. 5 pulse width distortion |t phl - t plh | = pwd 90 ns c l = 100 pf 9 90 loaded as per fig. 5 propagation delay diff erence between any 2 parts pdd -130 130 ns c l = 100 pf 10 -130 130 loaded as per fig. 5 output rise time (10-90%) t r 6ns 5 output fall time (90-10%) t f 6ns 5 logic high common mode transient immunity |cm h |30 kv/ ? s |v cm | = 1000 v, i f = 4.0 ma, v cc = 5 v, t a = 25 c 97 logic low common mode transient immunity |cm l |30 kv/ ? s |v cm | = 1000 v, v f = 0 v, v cc = 5 v, t a = 25 c 97 table 7. package characteristics parameter symbol min. typ. max. units test conditions fig. note input-output momentary withstand voltage* v iso 3750 (acpl-m484/p484) 5000 (acpl-w484) v rms rh < 50%, t = 1 min. t a = 25 c 5, 8 input-output resistance r i-o 10 12 ohm v i-o = 500 v dc 5 input-output capacitance c i-o 0.6 pf f = 1 mhz, v i-o = 0 v dc 5 * the input-output momentary withstand voltage is a dielectric v oltage rating that should not be interpreted as an input-output c ontinuous voltage rating. for the continuous voltage rating, refer to the iec/en/din en 60747-5-5 insulation characteristics table (if ap plicable). uvlo figure 10a & b show typical output waveforms during power-up and power-down processes. notes: 1. derate total package power dissipation, p t , linearly above 70 c free-air temperature at a rate of 4.5mw/c(acpl-p484/w484) and linearly above 85 c free-air temperature at a rate of 0.75mw/c(acpl-m484). 2. detector requires a vcc of 4.5 v or higher for stable operation as output might be unstable if vcc is lower than 4.5 v. be s ure to check the power on/off operation other than the supply current. 3. duration of output short circuit time should not exceed 500 ? s. 4. input capacitance is measured between pin 1 and pin 3. 5. device considered a two-terminal device: pins 1, 2 and 3 shorted together and pins 4, 5 and 6 shorted together. 6. the t plh propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 v point on the leading edge of the output pulse. the t phl propagation delay is measured from the 50% point on the tr ailing edge of the input pulse to the 1.3 v point on the trailing edge of the output pulse. 7. cm h is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic high state, v o > 2.0 v. cm l is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state, v o < 0.8 v. note: equal value split resistors (rin/2) must be used at both ends of the led. 8. in accordance with ul 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 v rms for one second (leakage detection current limit, i i-o < = 5 ? a). this test is performed before the 100% production test for partial discharge (method b) shown in the iec/en/din en 60747-5-5 insulation characteristics table, if applicable. 9. pulse width distortion (pwd) is defi ned as |t phl - t plh | for any given device. 10. the diff erence of t plh and t phl between any two devices under the same test condition. 11. use of a 0.1 ? f bypass capacitor connected between pins vcc and ground is recommended.
9 figure 1. typical logic low output voltage vs. temperatur e figure 2. typical logic high output current vs. temperature figure 3. typical output voltage vs. forward input current figure 4. typical input diode forward characteristic figure 5. circuit for t plh , t phl , t r , t f t a - te m perature - c v o l - l o w level o utput v o lta g e - v i o = 6.5 ma i o = 3.5 ma pul s e g e n. t r = t f = 5 ns f = 1 00 khz 1% duty cycle v o = 5 v z o = 50 0.0 1 0.0 1 5 0.02 0.025 0.03 0.035 0.04 0.045 - 40 -1 020 5080 11 0 v cc = 4.5 v v f = 0 v 0 1 2 3 4 5 0 0.5 11 .5 2 2.5 3 i f - i n put curre n t - ma vo - o utput v o lta g e - v v cc = 4.5 v t a = 25 c * 0. 1 p f b ypa ss C s ee no te 11 0.02 0.04 0.06 0.08 0. 1 - 40 -1 020 50 80 11 0 t a - te m perature - c (v cc -v o h ) - high level o utput voltage - v i f = 4 ma i o = - 6.5 ma i o = - 3.5 ma 0.0000 1 0.000 1 0 0.00 1 00 0.0 1 000 0. 1 0000 1 .00000 1 0.00000 1 00.00000 1 . 11 .2 1 .3 1 .4 1 .5 1 .6 i f - f o rward curre n t - ma v f - f o rward v o lta g e - v t a = 25 c r 1 i n put mon it o ri ng no de * c1 = 1 5 pf 5 k : d1 d 2 d 3 d 4 6 1 9 : 5 v o utput v o mon it o ri ng no de v cc t plh t phl v o h 1 .3 v v o l ( 0 v) i n put i f o utput v 50 % i f ( on ) 0 ma i f ( on ) 6 1 5 2 4 3 s hield the pr ob e a n d ji g capacita n ce s are i n cluded i n c1 . 7 ma 4 ma i f( on ) 560 : 1 000 : r 1 all di o de s are either 1 n9 1 6 o r 1 n3064
10 figure 6. typical propagation delays vs. temperature figure 7. typical logic high output voltage vs. supply voltage figure 8. typical propagation delay vs. supply voltage figure 9. test circuit for common mode transient immunity and typical waveforms 60 80 1 00 1 20 05 1 0 1 520253035 v cc - s upply voltage - v tp - propagation delay - ns 60 80 1 00 1 20 - 40 -1 0205080 11 0 t a - temperature - c tp - propagation delay - ns v o - o utput voltage - v |v c m | 0 v v c m (peak) c m h c m l i f = 4 ma t a = 25 c a r i n / 2 b + C v ff 0. 1 p f v cc o utput v o mon it o ri ng no de +C v c m v cc = 4.5 v t phl (i f = 4 ma) t phl (i f = 7 ma) t plh (i f = 4 ma) t plh (i f = 7 ma) 0 5 1 0 1 5 20 25 30 35 5 0 1 0 1 520253035 v cc - s upply voltage - v t a = 25 c t phl (i f = 4 ma) t phl (i f = 7 ma) t plh (i f = 4 ma) t plh (i f = 7 ma) r i n / 2 v o h o utput v o s witch at a: i f = 4 ma v o ( m i n. )* s witch at b : v f = 0 v v o l v o ( m ax . )* * s ee no te 7 6 1 5 2 4 3 s hield
11 vcc = 2~4 v vcc out p ut i . le d is on h ig h i mpe d a nc e s t a t e h ig h i mpe d a nc e s t a t e dis ch arge d e l ay , d epe nd i n g o n th e po w er s u pp l y s l e w ra t e vcc = 2~4 v 0 v 10 v 1 ms vcc = 1.8 v (t yp ) vcc = 1.8 v (t yp ) vcc out p ut ii . le d is off dis ch arge d e l ay , d epe nd i n g o n th e po w er s u pp l y s l e w ra t e 0 v 10v 1 ms h ig h i mpe d a nc e s t a t e h ig h i mpe d a nc e s t a t e vcc = 2~4 v vcc = 2~4 v vcc = 1.8 v (t yp ) vcc = 1.8 v (t yp ) figure 10a. vcc ramp when led is on figure 10b. vcc ramp when led is off
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2012 avago technologies. all rights reserved. av02-2947en - february 17, 2012 thermal model for acpl-p484/w484 so6 package optocoupler defi nitions r 11 : junction to ambient thermal resistance of led due to heating of led r 12 : junction to ambient thermal resistance of led due to heating of detector (output ic) r 21 : junction to ambient thermal resistance of detector (output ic) due to heating of led. r 22 : junction to ambient thermal resistance of detector (output ic) due to heating of detector (output ic). p 1 : power dissipation of led (w). p 2 : power dissipation of detector / output ic (w). t 1 : junction temperature of led (?c). t 2 : junction temperature of detector (?c). t a : ambient temperature. t 1 : temperature diff erence between led junction and ambient (?c). t 2 : temperature deference between detector junction and ambient. ambient temperature: junction to ambient thermal re- sistances were measured approximately 1.25cm above optocoupler at ~23?c in still air description this thermal model assumes that an 6-pin single-channel plastic package optocoupler is soldered into a 7.62 cm x 7.62 cm printed circuit board (pcb). the temperature at the led and detector junctions of the optocoupler can be calculated using the equations below. t 1 = (r 11 * p 1 + r 12 * p 2 ) + t a -- (1) t 2 = (r 21 * p 1 + r 22 * p 2 ) + t a -- (2) jedec specifi cations r 11 r 12 , r 21 r 22 low k board 167 64, 81 89 high k board 117 31, 39 54 notes: 1. maximum junction temperature for above parts: 125 c. thermal model for acpl-m484 so5 package optocoupler defi nitions r 11 : junction to ambient thermal resistance of led due to heating of led r 12 : junction to ambient thermal resistance of led due to heating of detector (output ic) r 21 : junction to ambient thermal resistance of detector (output ic) due to heating of led. r 22 : junction to ambient thermal resistance of detector (output ic) due to heating of detector (output ic). p 1 : power dissipation of led (w). p 2 : power dissipation of detector / output ic (w). t 1 : junction temperature of led (?c). t 2 : junction temperature of detector (?c). t a : ambient temperature. t 1 : temperature diff erence between led junction and ambient (?c). t 2 : temperature deference between detector junction and ambient. ambient temperature: junction to ambient thermal re- sistances were measured approximately 1.25cm above optocoupler at ~23?c in still air description this thermal model assumes that an 5-pin single-channel plastic package optocoupler is soldered into a 7.62 cm x 7.62 cm printed circuit board (pcb). the temperature at the led and detector junctions of the optocoupler can be calculated using the equations below. t 1 = (r 11 * p 1 + r 12 * p 2 ) + t a -- (1) t 2 = (r 21 * p 1 + r 22 * p 2 ) + t a -- (2) jedec specifi cations r 11 r 12 , r 21 r 22 low k board 191 77, 91 99 high k board 126 26, 35 51 notes: 1. maximum junction temperature for above parts: 125 c.


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